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ISL9201
Data Sheet February 22, 2007 FN6429.1
Li-ion Battery Charger
The ISL9201 is an integrated single-cell Li-ion or Li-polymer charger capable of operating at an input voltage as low as 2.5V. The low operating voltage allows the charger to work with a variety of AC adapters. The ISL9201 operates as a linear charger when the AC adapter is a voltage source. The battery is charged in a standard Li-ion charge profile, i.e. a constant current phase followed be a constant voltage phase (CC/CV). The charge current during the constant current phase is determined by the external resistor connected to the IREF pin. When the adapter output is a current-limited voltage source and the current limit is smaller than the programmed constant current of the IC, the ISL9201 operates as a pulse charger where the charge current is determined by the current limit of the AC adapter during the constant current phase. The ISL9201 operates in a linear mode during the constant voltage phase in both adapter cases.
Features
* Complete Charger for Single-Cell Li-ion/Polymer Batteries * Integrated Pass Element and Current Sensor * No External Blocking Diode Required * Low Component Count and Cost * 25mV Voltage Accuracy Over-Temperature and Input Voltage Range * 20mV Voltage Accuracy at Room Temperature * Programmable Charge Current * Charge Current Thermal Foldback for Thermal Protection (ThermaguardTM) * Trickle Charge for Fully Discharged Batteries * Power Presence and Charge/EOC Indications * Less than 4A Leakage Current off the Battery when No Input Power Attached or Charger Disabled * Ambient Temperature Range: -40C to +85C * DFN Package * Pb-Free Plus Anneal Available (RoHS Compliant)
Preliminary The ISL9201 incorporates ThermaguardTM, which protects the IC against over-temperature. If the die temperature rises above a typical value of +110 C, the thermal foldback function reduces the charge current to prevent further temperature rise. The ISL9201 also includes a timer to set the time reference for the delay time of the end-of-charge (EOC) and recharge indications. The timer is programmable with an external capacitor. A logic input and an open-drain logic output are available for controlling the charger and indicating the charger status. The EN pin enables the charger. The STATUS pin is an open-drain output which turns on when the charger is delivering current. The charger uses a 10 Ld 3x3 DFN package to maximize thermal conductivity.
Applications
* Mobile Phones * Blue-Tooth Devices * PDAs * MP3 Players * Stand-Alone Cradle or Travel Chargers * Other Handheld Devices
Ordering Information
PART NUMBER ISL9201IRZ PART TEMP. MARKING RANGE (C) DLGA -40 to +85 PACKAGE (Pb-free) PKG DWG. #
Pinout
ISL9201 (10 LD DFN) TOP VIEW
VIN GND STATUS TIME GND 1 2 3 4 5 10 9 8 7 6 VBAT VSEN IREF V2P8 EN
10 Ld 3x3 DFN L10.3x3
ISL9201IRZ-T DLGA
-40 to +85 10 Ld 3x3 DFN L10.3x3 Tape & Reel
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL9201 Typical Applications
5V WALL ADAPTER 1F C1 R1 1 1k R1 D1 VIN VBAT 1F C2 ISL9201IRZ
BATTERY PACK
VSEN IREF
STATUS EN V2P8 TIME
4.7F C3 CTIME 15nF
GND
RIREF 100k
Pin Description
VIN (Pin 1)
VIN is the input power source. Connect to a wall adapter.
V2P8 (Pin 7)
This is a 2.8V reference voltage output. This pin provides a 2.8V voltage source when the input voltage is above the POR threshold and outputs 0V otherwise. The V2P8 pin can be used as an indication for adapter presence.
GND (Pin 2)
GND is the connection to system ground.
IREF (Pin 8)
This is the charge current programming and monitoring pin. Connect a resistor between this pin and GND to set the charge current during the constant current phase, as given by Equation 1:
80 I REF = ---------------R IREF (A) (EQ. 1)
STATUS (Pin 3)
STATUS is an open-drain output indicating charging and inhibit states. The STATUS pin is pulled LOW when the charger is charging a battery. It will be turned into high impedance when the charge current drops to IMIN. This high impedance state will be latched until a recharge cycle or a new charge cycle starts. When the charger is disabled, the STATUS pin outputs high impedance.
Where RIREF is in k.
TIME (Pin 4)
The TIME pin determines the oscillation period by connecting a timing capacitor between this pin and GND. The oscillator also provides a time reference for the charger.
VSEN (Pin 9)
VSEN is the remote voltage sense pin. Connect this pin as close to the battery positive terminal as possible. If the VSEN pin is left floating, its voltage drops to 0V and the charger operates in trickle mode.
GND (Pin 5)
GND is the connection to system ground.
VBAT (Pin 10)
VBAT is the connection to the battery. Typically a 10F Tantalum capacitor is needed for stability when there is no battery attached. When a battery is attached, only a 0.1F ceramic capacitor is required.
EN (Pin 6)
EN is the enable logic input. Connect the EN pin to HIGH to disable the charger. Connect the EN pin to LOW or leave it floating to enable the charger. There is an internal 400k pull-down resistor at this pin.
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FN6429.1 February 22, 2007
ISL9201
Absolute Maximum Ratings
Voltage Ratings for All Pins . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V Charge Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0A ESD Rating Human Body Model (Per EIA JESD22 Method A114-B) . . . . .2kV Machine Model (Per EIA JED-4701 Method C-111) . . . . . . . 200V
Thermal Information
Thermal Resistance JA (C/W) JC (C/W) 3x3 DFN Package (Note 1) . . . . . . . . . 48 6 Maximum Junction Temperature (Plastic Package). . . . . . . . +150C Maximum Storage Temperature Range . . . . . . . . .-65C to +150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300C
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . .-40C to +85C Operating Supply Voltage (VIN Pin). . . . . . . . . . . . . . . 4.25V to 6.5V Programmed Charge Current . . . . . . . . . . . . . . . . . 50mA to 900mA
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. +150C max junction temperature is for information purposes only. In reality, the current foldback feature will prevent the junction from rising above the typical temperature of +110C.
1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB379. 2. For JC, the "case temp" location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Typical Values Are Tested at VIN = 5V and TA = +25C. All Maximum and Minimum Values Are Guaranteed Under the Recommended Operating Supply Voltage Range and Ambient Temperature Range, Unless Otherwise Noted. SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
PARAMETER POWER-ON RESET Rising POR Threshold Falling POR Threshold VIN-BAT OFFSET VOLTAGE Rising Edge STANDBY CURRENT BAT Pin Sink Current VIN Pin Supply Current VIN Pin Supply Current VOLTAGE REGULATION Output Voltage Output Voltage PMOS On Resistance CHARGE CURRENT (Note 4) Constant Charge Current
VPOR VPOR
VBAT = 3.0V, use V2P8 pin to indicate the comparator output.
3.2 2.25
3.6 2.5
3.9 2.7
V V
VOS
VBAT = 4.2V, IBAT = 20mA, use STATUS pin to indicate the comparator output (Note 3)
45
80
100
mV
ISTANDBY Charger disabled or the input is floating IVIN IVIN Charger disabled Charger enabled
-
150 1.0
3.3 250 -
A A mA
VCH VCH rDS(ON)
Tested at 50mA load, 5V input and +25C -40C < TA < +85C, 4.3V < VIN < 6.5V VBAT = 4.0V, charge current = 0.35A
4.180 4.175 -
4.20 4.20 500
4.220 4.225 -
V V m
ICC
VIN = 5V, RIREF = 887k, VBAT = 3.0V to 4.0V VIN = 5V, RIREF = 100k, VBAT = 3.0V to 4.0V
60 725 6 64 60
90 800 10 80 80
120 840 14 96 105
mA mA mA mA mA
Trickle Charge Current
ITRK
VIN = 5V, RIREF = 800k, VBAT = 0V to 2.5V VIN = 5V, RIREF = 100k, VBAT = 0V to 2.5V
End-of-Charge Current V2P8 PIN OUTPUT V2P8 Pin Output Voltage CHARGE THRESHOLDS Preconditioning Charge Threshold Voltage Preconditioning Voltage Hysteresis
IMIN
RIREF = 100k
VV2P8
Load current less than 1mA
2.8
2.9
3.0
V
VMIN VMINHYS
2.7 50
2.8 100
2.9 150
V mV
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FN6429.1 February 22, 2007
ISL9201
Electrical Specifications
Typical Values Are Tested at VIN = 5V and TA = +25C. All Maximum and Minimum Values Are Guaranteed Under the Recommended Operating Supply Voltage Range and Ambient Temperature Range, Unless Otherwise Noted. (Continued) SYMBOL VRCH VRCHHYS TEST CONDITIONS Referenced to the charger output voltage VCH MIN -225 TYP -150 50 MAX -70 UNITS mV mV
PARAMETER Recharge Threshold Recharge Threshold Hysteresis INTERNAL TEMPERATURE MONITORING Charge Current Foldback Threshold OSCILLATOR Oscillation Period LOGIC INPUT AND OUTPUTS EN Pin Logic Input High EN Pin Logic Input Low EN Pin Internal Pull Down Resistance STATUS Output Voltage When On STATUS Leakage Current NOTE:
TFOLD
110
C
tOSC
CTIME = 15nF
2.7
3.0
3.3
ms
1.3 200 10mA current VSTATUS = 6.5V -
400 -
0.5 600 0.8 1
V V k V A
3. The 4.2V VBAT is selected so that the STATUS output can be used as the indication for the offset comparator output indication. If the VBAT is lower than the POR threshold, no output pin can be used for indication. 4. The charge current can be affected by the thermal foldback function if the IC under the test setup cannot dissipate the heat.
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FN6429.1 February 22, 2007
ISL9201 Functional Block Diagram
VIN QMAIN VBAT
C1 TEMPERATURE MONITORING QSEN 100000:1 CURRENT MIRROR ISEN
REFERENCES
V2P8
VPOR
VCH
VMIN
IT
VRECHRG
VIN
VSEN
INPUT_OK
+ VPOR + 80MV -
RIREF
IREF
IR CURRENT REFERENCES IMIN = IR/10
+ CA CHRG + VA -
+ -
VCH + TRICKLE/FAST MINBAT ISEN
(16 LD OPTION)
VMIN VRECHRG
+ MIN_I INPUT_OK LOGIC EN STATUS + RECHARGE
ESD DIODE STATUS
TIME CTIME GND GND OSC COUNTER
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FN6429.1 February 22, 2007
ISL9201 Theory of Operation
The ISL9201 is an integrated charger for single-cell Li-ion or Li-polymer batteries. The ISL9201 is capable of operating in two operation modes; linear charge mode and pulse charge mode. The ISL9201 functions as a traditional linear charger when powered with a voltage source adapter. When powered with a current-limited adapter, the charger functions as a pulse charger by fully turning on the pass element and the power dissipation is hence drastically reduced.
4.2V IREF
TRICKLE
CC
CV CHARGE VOLTAGE CHARGE CURRENT
VREC
2.8V 10% IREF
IMIN
Constant Current Phase
The ISL9201 starts the charge at a constant current (CC) phase. The charge current is regulated to fast charge the battery before the final voltage has been reached. The charge current is programmable with the IREF pin and has two operation modes: trickle mode and constant current mode, depending on the battery voltage. When the battery voltage is lower than 2.8V, the charger operates in trickle mode where the charge current is set at 10% of the constant current mode current. The trickle mode is for preconditioning a deeply discharged battery. Once the battery voltage is above the typical 2.8V threshold, the constant current (CC) mode starts. The constant current is programmable between 50mA to 1A.
CHG STATUS INDICATION
TIME
FIGURE 1. TYPICAL CHARGE CYCLE WITH TIMEOUT
POR
The power-on reset (POR) function monitors the supply voltage. The POR has a rising edge threshold of 3.6V typical and 2.5V typical for falling edge. The charger is expected to operate when the input voltage is above the POR threshold. After POR the charger will continue to operate for supply voltage down to 2.5V typical. It is also required that the supply voltage be higher than the VBAT pin voltage by a typical 80mV for the charger to function.
Constant Voltage Phase
When the battery reaches the final voltage, the ISL9201 switches the operation to a constant voltage (CV) phase. The output voltage is regulated at the final voltage value. During the constant voltage phase, the charge current reduces gradually as the cell voltage rises.
Oscillator
The ISL9201 incorporates with an oscillation circuit using an external timing capacitor connected to the TIME pin. The oscillator sets the delay time for the STATUS indication for EOC and recharge conditions to prevent nuisance trip due to in-rush currents.
Charge Termination and Recharge
As the charge current reaches the EOC (end of charge) current threshold during the constant voltage phase, the STATUS pin open-drain FET is turned off to indicate an EOC condition. The EOC current is fixed at 10% of the programmed constant charge current. When the EOC condition is reached, the STATUS pin is latched at logic HIGH, the charger, however, will continue to charge the battery until the EN pin is pulled to logic HIGH or the input power has been removed. When the battery voltage falls to 150mV below the constant voltage value, the STATUS latch will be reset and open-drain FET is turned on to indicate a charging condition again. An internal delay is implemented at the STATUS pin for both EOC and recharge conditions to prevent nuisance trips due to noise and fast load current transitions. The delay time is approximately one clock cycle (varies between 0.5 and 1.5 clock) of the internal oscillator, which is programmed by the timer capacitor. The typical charge waveforms in Figure 1 show the complete cycle operation.
Indications
The ISL9201 has an open-drain status indication pin. The STATUS pin requires an external pull-up resistor to function properly. The V2P8 pin can be used as the presence of AC adapter.
Charger Disable
The EN pin allows the user to disable the charger. When the charger is disabled, all internal circuits are shut down and the quiescent current at the input pin is less than 150A typical.
Remote Battery Voltage Sensing
A kelvin sense pin is provided for battery terminal voltage monitoring. Thus, the IR drop due to the connection leads and PCB traces can be eliminated, resulting in a more accurate battery voltage monitoring, especially when the battery is located at a significant distance away from the ISL9201. If remote sensing is not needed, the VSEN pin can be connected to VBAT at the IC.
Thermal Foldback
In the event where the die temperature reaches the thermal foldback threshold (+110C typical), the charge current is reduced accordingly to prevent further temperature rise.
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FN6429.1 February 22, 2007
ISL9201 Applications Information
PCB Layout Guidance
The ISL9201 uses a thermally-enhanced DFN package that has an exposed thermal pad at the bottom side of the package. The layout should connect as much as possible to copper on the exposed pad. Typically, the component layer is more effective in dissipating heat. The thermal impedance can be further reduced by using other layers of copper connecting to the exposed pad through a thermal via array. A minimum of four (4) such thermal vias are recommended. Each thermal via is recommended to have 0.3mm diameter and 0.7mm distance from other thermal vias.
PWR OFF CHARGER: OFF STATUS: OFF FAULT: OFF NOT ENABLED VIN > VPOR
POR CHARGER: OFF CHARGER DISABLED ANYTIME EN PIN CHANGES TO DISABLE CHARGER: OFF STATUS: OFF FAULT: OFF ENABLED STATUS: OFF FAULT: OFF
Stability Consideration
The ISL9201 should behave like a current and thermal limited linear regulator. The charger operation is stable with an output ceramic decoupling capacitor in the range of 1F to 200F, with or without a battery connected.
Input Bypass Capacitor
Due to the inductance of the power leads of the wall adapter or USB source, the input capacitor type must be properly selected to prevent high voltage transient during a hot-plug event. A tantalum capacitor is a good choice for its high ESR, providing damping to the voltage transient. Multi-layer ceramic capacitors, however, have a very low ESR and hence when chosen as input capacitor, a 1- series resistor must be used, as shown in the "Typical Applications" on page 2, to provide adequate damping.
TRICKLE CHARGE CHARGER: ON STATUS: ON FAULT: OFF
VBAT DROPS BELOW VMIN
VBAT > VMIN
State Machine Diagram
The state machine diagram is shown in Figure 2. The diagram starts with the Power-Off state. When the input voltage rises above the POR threshold, the charger resets itself. Then, if the charger is disabled, the charger stays in the Charger Disabled state. If the charger is enabled, the trickle charge starts. Anytime when VBAT is above the preconditioning charge threshold voltage, the charger enters the fast charge state. When VBAT reaches 4.2V, the charger enters a constant voltage state where VBAT is regulated at 4.2V. When the charge current decays to the IMIN threshold, the STATUS indicates an EOC condition. This condition is latched until either the EN pin is toggled or a POR condition has occurred at VIN.
FAST CHARGE CHARGER: ON STATUS: ON FAULT: OFF
VBAT > VRCH AND ICHG < IMIN CHARGE COMPLETE CHARGER: ON STATUS: OFF FAULT: OFF VBAT < VRCH
FIGURE 2. STATE MACHINE DIAGRAM
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FN6429.1 February 22, 2007
ISL9201 Dual Flat No-Lead Plastic Package (DFN)
2X 0.15 C A A D 2X 0.15 C B
L10.3x3
10 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL A A1 MIN 0.80 0.18 1.95 1.55 0.25 0.30 NOMINAL 0.90 0.20 REF 0.23 3.00 BSC 2.00 3.00 BSC 1.60 0.50 BSC 0.35 10 5 0.40 1.65 2.05 0.28 MAX 1.00 0.05 NOTES 5,8 7,8 7,8 8 2 3 Rev. 3 6/04 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd refers to the number of terminals on D. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389.
E 6 INDEX AREA TOP VIEW B
A3 b D D2 E E2
0.10 C
e k L N Nd
A 0.08 C SEATING PLANE SIDE VIEW A3 C
7 (DATUM B) 6 INDEX AREA (DATUM A) 1 2 D2
8
D2/2 NX k E2 E2/2
NX L N 8 N-1 NX b e (Nd-1)Xe REF. BOTTOM VIEW 5 0.10 M C A B
C L 0.415 NX (b) 5 SECTION "C-C" C NX b (A1) 0.200 L NX L e CC TERMINAL TIP
FOR ODD TERMINAL/SIDE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 8
FN6429.1 February 22, 2007

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